The technical work in SIPHO-G is organized around the design, fabrication and the demonstration of the SIPHO-G building blocks in different prototypes. The technical activities are grouped in four work packages:
- WP2 (leader NXT) provides the design modelling framework for device optimization and the design enablement for the consortium to implement the SIPHO-G building blocks in prototype demonstrators. WP2 will define the epitaxial layer stacks that need to be targeted within WP3 for maximising device efficiency. WP2 will also define the device physical dimensions that will be fabricated in WP4 to achieve targeted specifications. WP2 will finally develop compact models of the SIPHO-G devices in the form of a PDK to enable the end-users of the consortium to design prototype demonstrators in WP5.
- WP3 (leader AMBEL) develops the complex epitaxial growth processes necessary for the realization of the SIPHO-G devices in a silicon photonics platform. WP3 interacts with WP2 for optimization of the epitaxial stacks and with WP4 for the implementation of the epitaxial processes in a silicon photonics platform.
- WP4 (leader IMEC) develops the technology to enable the integration of the SIPHO-G building blocks in a silicon photonics platform. WP4 also fabricates the SIPHO-G PIC prototypes. Finally, WP4 provides test wafers to WP3 for the epitaxial growth development and integrates these epitaxial growth processes in the silicon photonics platform. Two fabrication runs are foreseen in WP4: The first fabrication run aims to (i) build the test vehicle for the development of advanced SIPHO-G devices with significantly enhanced performance and (ii) provide initial demonstrator prototypes to WP5. The second run aims to fabricate the final demonstrators for WP5.
- WP5 (leader Mellanox) validates the potential of the SIPHO-G technology by designing and testing application-oriented demonstrators. WP5 will be based on the compact models provided by WP2 for the design and layout of the PIC demonstrators. WP5 also designs and fabricates the EIC to enable the PIC-EIC demonstrator of SIPHO-G. After PIC fabrication in WP4, WP5 will receive the prototype demonstrators for characterization. The necessary assembly work to enable prototype testing will also be performed within WP5.