IMEC will be responsible for the following tasks:
- Overall project and consortium management (WP1). WP4 leader.
- Design, characterization and fabrication of the SIPHO-G building blocks
- Contributions to the layout of the PICs for the prototype demonstrators in the two
- Process development for the targeted performance of SIPHO-G devices. Preparation of test
wafers for epitaxial growth development by AMBEL. Epitaxial growth development of Oband
QCSE stacks and APDs.
- Fabrication of the SIPHO-G PIC demonstrators in imec’s 300mm Silicon Photonics
technology platform: Co-integration of the SIPHO-G building blocks with passive silicon
photonics devices, contacts, metal layers, Al pads and micro-bumps, to enable flip-chip
assembly of the EICs.
- Flip-chip assembly of the EIC dies on the PIC die for characterization of the EIC-PIC